Analysis of a Novel Non-Volatile Look-Up Table (NV LUT) Controller Design with Resistive Random-Access Memories (RRAM) for Field-Programmable Gate Arrays (FPGA)
| Autor: | T. Nandha Kumar, Hock Leong Chee, Desmond Wen Hui Kang, Haider Af Almurib |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
010302 applied physics
Computer science Circuit design Controller (computing) Reading (computer) 020208 electrical & electronic engineering 02 engineering and technology Memristor 01 natural sciences Resistive random-access memory law.invention Non-volatile memory law 0103 physical sciences Lookup table 0202 electrical engineering electronic engineering information engineering Electronic engineering Field-programmable gate array |
| Zdroj: | 2019 IEEE Regional Symposium on Micro and Nanoelectronics (RSM). |
| DOI: | 10.1109/rsm46715.2019.8943560 |
| Popis: | This paper studies the simulation results of a novel controller circuit design for non-volatile (NV) look-up tables (LUT) combined with an electrical model of a resistive random-access memory (RRAM)—an emerging non-volatile memory (NVM) device. The Write and Read schemes of the controller is tested for a 2x2 RRAM array. The selected RRAM successfully switches between low ‘0’ and high ‘1’ while the unselected the RRAM remain undisturbed, demonstrating the elimination of the intrinsic sneak-path current problem in RRAMs. Reading of a selected RRAM is also performed with agreeable results. |
| Databáze: | OpenAIRE |
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