A high-density data-path generator with stretchable cells
| Autor: | S. Iwade, S. Kayano, Hisashi Matsumoto, Y. Tsujihashi, M. Sakao, Osamu Kitada, H. Hishimaki, H. Nakao, A. Miyanishi |
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| Rok vydání: | 1994 |
| Předmět: |
Engineering
Generator (computer programming) business.industry Electrical engineering Schematic Integrated circuit Topology Chip law.invention CMOS law Block (programming) Hardware_INTEGRATEDCIRCUITS Electrical and Electronic Engineering Routing (electronic design automation) business Circuit diagram |
| Zdroj: | IEEE Journal of Solid-State Circuits. 29:2-8 |
| ISSN: | 0018-9200 |
| DOI: | 10.1109/4.272088 |
| Popis: | This paper describes a newly developed module generator for cell-based design which generates a data-path layout comparable to a handcrafted one both in speed and in transistor density. The chip designer enters his schematic data-path diagram using the configurable function block library provided. There is no constraint either in the number of function blocks used, or in how to interconnect them. The data-path generator generates the function blocks, which are components of the data-path, and automatically places and routes them. The configurable function blocks were developed in 0.8-/spl mu/m double metal CMOS technology. A new cell structure suitable for over the cell routing, called "stretchable cell with access free terminals," is adopted as a bit-slice element of the data-path generator. This removes the routing region outside the cell for the wiring between function blocks, and a high density layout can be obtained. Also because of the new cell structure, there is no upper limit on the number of tracks per bit. Using this data-path generator, several data-paths were generated with high density of more than 6k Trs./mm/sup 2/. > |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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