IBM Power9 Processor Architecture
| Autor: | Satish Kumar Sadasivam, Thompto Brian W, William J. Starke, Ron Kalla |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Input/output Multi-core processor Cellular architecture Computer science 02 engineering and technology Simultaneous multithreading 01 natural sciences 020202 computer hardware & architecture Microarchitecture Instruction set Computer architecture Hardware and Architecture 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering IBM Field-programmable gate array Software |
| Zdroj: | IEEE Micro. 37:40-51 |
| ISSN: | 0272-1732 |
| Popis: | The IBM Power9 processor has an enhanced core and chip architecture that provides superior thread performance and higher throughput. The core and chip architectures are optimized for emerging workloads to support the needs of next-generation computing. Multiple variants of silicon target the scale-out and scale-up markets. With a new core microarchitecture design, along with an innovative I/O fabric to support several accelerated computing requirements, the Power9 processor meets the diverse computing needs of the cognitive era and provides a platform for accelerated computing. |
| Databáze: | OpenAIRE |
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