22FFL: A high performance and ultra low power FinFET technology for mobile and RF applications
| Autor: | Zhanping Chen, W. Xu, A. Sultana, Sell Bernhard, Ayan Kar, Nikola Stojanovic, Ranjith Kumar, Jingyan Zhang, R. Russell, M. Giraud-Carrier, J. Sandford, J. Stoeger, K. Phoa, Lajoie Travis W, Guannan Liu, S. Liu, Yuegang Zhang, S. Cha, S. Mudanai, Yunzhe Ma, Dale Young, P. Dhage, L. Paulson, P. Bai, L. Nguyen, J. Wan, Ku Chieh-Jen, H.-J. Lee, B. Bigwood, A. S. Roy, Eric Karl, James Waldemer, Pengyu Fan, K. Pierce |
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| Rok vydání: | 2017 |
| Předmět: |
010302 applied physics
Bit cell Materials science business.industry 020208 electrical & electronic engineering Transistor Electrical engineering Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology 01 natural sciences law.invention PMOS logic law Logic gate 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Radio frequency Static random-access memory business NMOS logic Hardware_LOGICDESIGN Leakage (electronics) |
| Zdroj: | 2017 IEEE International Electron Devices Meeting (IEDM). |
| Popis: | A FinFET technology named 22FFL has been developed that combines high-performance, ultra-low power logic and RF transistors as well as single-pattern backend flow for the first time. High performance transistors exhibit 57%/87% higher NMOS/PMOS drive current compared to the previously reported 22nm technology [1]. New ultra-low power logic devices are introduced that reduce bit cell leakage by 28x compared to a regular SRAM cell enabling a new 6T low-leakage SRAM with bit cell leakage of sub 1pA/cell. An RF device with optimized layout has been developed and shows excellent f T /f MAX of (230GHz/284GHz) and (238GHz/242GHz) for NMOS and PMOS respectively. |
| Databáze: | OpenAIRE |
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