A 25-nm gate-length FinFET transistor module for 32nm node
| Autor: | Ming-Huan Tsai, Yu-Lien Huang, Li-Te Lin, Wang Shiang-Bau, Hung-Ming Chen, Eric Ou-Yang, Yuh-Jier Mii, Hsien-Hsin Lin, Hun-Jan Tao, Chia-Cheng Ho, Chen-Ping Chen, Jhon-Jhy Liaw, Jyh-Cherng Sheu, Feng Yuan, Chu-Yun Fu, Yi-Hsuan Liu, Li-Shiun Chen, Chia-Feng Hu, Chen-Nan Yeh, Shih-Peng Tai, Ming-Jie Huang, Chih-Sheng Chang, C.H. Chang, Shu-Tine Yang, Jeff J. Xu, Tsung-Lin Lee, Li-Shyue Lai, Shao-Ming Yu, Clement Hsingjen Wann, Kai-Ting Tseng, Leo Chen, Chih-Chieh Yeh, Ming-Feng Shieh, Chien-Chang Su, Jeng-Jung Shen, Shyue-Shyh Lin, Shih-Ting Hung, Hsien-Chin Lin, Shin-Chih Chen, Kin-Weng Wang, Yuan-Hung Chiu, Tsz-Mei Kwok, Fu-Kai Yang |
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| Rok vydání: | 2009 |
| Předmět: |
Hardware_MEMORYSTRUCTURES
Materials science business.industry Transistor Electrical engineering Audio time-scale/pitch modification Hardware_PERFORMANCEANDRELIABILITY law.invention Silicon-germanium chemistry.chemical_compound chemistry law Logic gate MOSFET Hardware_INTEGRATEDCIRCUITS Static random-access memory business Leakage (electronics) Random dopant fluctuation |
| Zdroj: | 2009 IEEE International Electron Devices Meeting (IEDM). |
| DOI: | 10.1109/iedm.2009.5424367 |
| Popis: | FinFET is the most promising double-gate transistor architecture [1] to extend scaling over planar device. We present a high-performance and low-power FinFET module at 25 nm gate length. When normalized to the actual fin perimeter, N-FinFET and P-FinFET have 1200 and 915 µA/µm drive current respectively at 100nA/µm leakage under 1V. To our knowledge this is the best FinFET drive current at such scaled gate length. This scaled gate length enables this FinFET transistor for 32nm node insertion. With aggressive fin pitch scaling, the effective transistor width is approximately 1.9X and 2.7X over planar for typical logic and SRAM on the same layout area (i.e., silicon real estate). Due to superior electrostatics and reduced random dopant fluctuation, this high drive current can be readily traded with V DD scaling for low power. |
| Databáze: | OpenAIRE |
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