| Autor: |
Nalamalpu Ankireddy, Fabrice Paillet, Chris Mozak, Gerhard Schrom, Nasser A. Kurd, Boyd Phelps, Ashish Khanna, Jonathan P. Douglas, Anant Deval |
| Rok vydání: |
2015 |
| Předmět: |
|
| Zdroj: |
VLSIC |
| DOI: |
10.1109/vlsic.2015.7231304 |
| Popis: |
Intel Core™ M and 5th generation of Core™ processors (code named Broadwell) are fabricated on an optimized 14 nm process technology node resulting in a 49% reduction in feature-neutral die area. 14nm created a new optimized process flavor for Core™ M to improve energy efficiency for mobile devices. Techniques and optimizations were implemented to deliver 2.5x TDP reduction coupled with up-to 60% higher graphics performance. New process technology combined with various design techniques reduced the minimum voltage of operation by 50 m V. Broadwell introduces the second generation of Fully Integrated Voltage Regulator with better droop control and parallel boot LVR along with other power-reduction features resulting in 35% reduction in active and standby power over first generation. 3DL inductor technology introduced for the first time in Broadwell, enables 30 % reduction in package thickness and improved low-load efficiency. IO re-partitioning of the SOC and a major re-design of DDR system resulted in 30% reduction in I/O power. Shutting down various parts of the SOC die in various idle states (C∗ states) resulted in 60% reduction in the idle power. New software controlled co-optimization methods were implemented such as duty-cycle control and dynamic display support to improve the energy efficiency of the graphics and the display subsystem. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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