A 400-Ms/s frequency translating bandpass sigma-delta modulator

Autor: H. Tao, J.M. Khoury
Rok vydání: 1999
Předmět:
Zdroj: IEEE Journal of Solid-State Circuits. 34:1741-1752
ISSN: 0018-9200
DOI: 10.1109/4.808899
Popis: A bandpass /spl Sigma/-/spl Delta/ modulator is described in this paper that uses frequency translation inside the /spl Sigma/-/spl Delta/ modulator loop to take advantage of the attributes of both continuous-time and discrete-time circuits. A CMOS direct-conversion modulator digitizes a 200 kHz intermediate-frequency signal centered at 100 MHz and produces baseband I/Q outputs with a peak signal-to-noise ratio of 54 dB. Images due to I/Q mismatches are suppressed by 50 dB. This 0.35-/spl mu/m digital CMOS chip operates from a 2.7/3.3-V supply, dissipates 330 mW, and occupies 3.2 mm/sup 2/.
Databáze: OpenAIRE