| Autor: |
Henk Spaanenburg, Michael J. Johnson, Jeff Groat, Todd C. Steeves, William R. Hancock, Gregory D. Peterson, Britton C. Read, John Shackleton, Richard G. Bishop |
| Rok vydání: |
1996 |
| Předmět: |
|
| Zdroj: |
SPIE Proceedings. |
| ISSN: |
0277-786X |
| DOI: |
10.1117/12.241005 |
| Popis: |
Under the sponsorship of Wright Laboratory (contract F33615-92-C-3802), Honeywell has been involved in the definition of next-generation display processors. This paper describes the top-level design approach, simulation and tradeoff studies, as well as the resulting architectural concepts for the cockpit display generator (CDG) processing system. The CDG architecture provides the graphical and video processing power needed to drive future high- resolution display devices and to generate advanced display formats for improved pilot situation awareness. The foremost objective of the CDG design is to achieve super-graphics workstation performance in a form factor suitable for avionics applications. The CDG design provides multichannel, high-performance 2-D and 3-D graphics and real-time video manipulation. Requirements for the CDG have been defined by the needs of Panoramic Cockpit Control and Display System (PCCADS) 2000 cockpits. Most notable are requirements for low-volume, low-power, real-time performance and tolerance for harsh environmental conditions. These goals have been realized by combining customized graphics pipelines with standard processing elements. The CDG design has been implemented as a software 'prototype' using VHDL performance and functional models. This novel design approach allows architectural tradeoffs to be made within the context of a standard design language, VHDL. Simulations have been developed to specify and evaluate particular system performance and functional and design aspects.© (1996) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
|
