Design and simulation of three ATM ASICs
| Autor: | Lee Sang Ho, Jong Arm Jun, Chan Kim, Kim Jae Geun |
|---|---|
| Rok vydání: | 2003 |
| Předmět: |
business.industry
Computer science Quality of service ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKS Physical layer Chip Application-specific integrated circuit Embedded system Asynchronous Transfer Mode ATM adaptation layer Hardware_INTEGRATEDCIRCUITS Layer (object-oriented design) business Telecommunications equipment |
| Zdroj: | AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360). |
| Popis: | In ASIC development, effective simulation leads into functionally more reliable chips as well as faster development time. This paper describes the design and the simulation techniques used in 3 ATM ASIC developments in ETRI. The three ASICs described are: ASAH-NIC-a 155 Mbps ATM SAR chip with internal PCI interface and SDH framer; ASAPI-L4-a 622 Mbps bidirectional ATM layer processing chip with UPC, OAM, QOS buffering capabilities; and ASAH-P4-a 622 Mbps ATM physical layer chip. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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