An All-Digital Despreading Clock Generator

Autor:	Shen-Iuan Liu, Shih-Han Ku, I-Ting Lee
Rok vydání:	2014
Předmět:	Engineering Clock signal business.industry Clock domain crossing Power consumption Electronic engineering Clock generator Electrical and Electronic Engineering business Cmos process Frequency modulation
Zdroj:	IEEE Transactions on Circuits and Systems II: Express Briefs. 61:16-20
ISSN:	1558-3791 1549-7747
DOI:	10.1109/tcsii.2013.2290913
Popis:	An all-digital despreading clock generator (DSCG) is presented. For an input spread-spectrum clock with a modulation frequency of 15-40 kHz and a down spreading of 5000 ppm, this DSCG successfully realizes a nonspread-spectrum clock. It is fabricated in a 0.18- μm CMOS process. For an input spread-spectrum clock of 1.5 GHz with a down spreading of 5000 ppm and a modulation frequency of 30 kHz, the measured root-mean-square and peak-to-peak jitters of this DSCG are 2.94 and 22.78 ps, respectively. The active area including input/output buffers is 0.84 mm2. Its power consumption is 19.8 mW, for a supply of 1.8 V.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::1370673aae7ab7fc352e25c72439cb67 https://doi.org/10.1109/tcsii.2013.2290913 Zobrazit plný text záznamu