Analysis of gate-induced drain leakage characteristics and threshold voltage modulation of plasma-doped FinFETs for low-power applications
| Autor: | Keun Hwi Cho, Ji-Myoung Lee, Dong-Won Kim, Ilsub Chung |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Materials science Dopant business.industry Doping 0211 other engineering and technologies General Engineering Analytical chemistry Oxide General Physics and Astronomy 02 engineering and technology Plasma 01 natural sciences Threshold voltage chemistry.chemical_compound Ion implantation chemistry 021105 building & construction 0103 physical sciences Optoelectronics Electrical measurements business Leakage (electronics) |
| Zdroj: | Japanese Journal of Applied Physics. 55:04ED17 |
| ISSN: | 1347-4065 0021-4922 |
| DOI: | 10.7567/jjap.55.04ed17 |
| Popis: | FinFET devices were fabricated using plasma doping both at the source and drain extensions and in the channel region. In an effort to overcome dopant loss after the strip process, oxide buffer layers were deposited prior to plasma doping. Owing to the oxide buffer, 76% of the dopants were retained after the strip process and even after ashing, thereby keeping a high doping concentration of over 1 × 1020 atoms/cm3 on the surface of the Si fin. The gate-induced drain leakage (GIDL) current was decreased by 2 orders of magnitude due to the shallow and abrupt plasma doping, compared to the performance with an ion implantation method. The threshold voltage (V th) was shifted by 250 mV through plasma doping of the channel. The doping conformality was evaluated using electrical measurements and a newly-proposed method based on the GIDL data with various fin widths. The conformal doping profile with a smaller dopant loss provides a smaller GIDL current. |
| Databáze: | OpenAIRE |
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