Hardware efficient LBIST with complementary weights

Autor:	Janak H. Patel, Liyang Lai, T. Rinderknecht, Wu-Teng Cheng
Rok vydání:	2006
Předmět:	Scheme (programming language) Computer science business.industry Test compression Automatic test pattern generation Set (abstract data type) Built-in self-test Fault coverage Overhead (computing) business Algorithm computer Computer hardware Electronic circuit computer.programming_language
Zdroj:	ICCD
DOI:	10.1109/iccd.2005.63
Popis:	In this paper, a novel logic BIST (built-in self test) scheme with complementary weights is proposed. The BIST implementation combines random patterns with complementary-weight weighted patterns. A heuristic algorithm based on deterministic test set is developed to compute weight set with complementary weights. Hardware similar to bit-flipping is used to produce complementary weights. For random resistant ISCAS circuits, complete fault coverage can be achieved with very low hardware overhead. Experiments show that two complementary weights are sufficient for weighted random pattern testing and it presents a novel direction for exploiting weighted patterns.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::133141520e76e4a5af68f0ff12fc02bd https://doi.org/10.1109/iccd.2005.63 Zobrazit plný text záznamu