Manufacturable High-Density 8 Mbit One Transistor–One Capacitor Embedded Ferroelectric Random Access Memory
| Autor: | S. R. Summerfelt, R. Bailey, P. Staubs, J. Rodriguez, K. Boku, Theodore S. Moise, M. Arendt, Gregory B. Shinn, K. Remack, J. Eliason, K. R. Udayakumar |
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| Rok vydání: | 2008 |
| Předmět: |
Interconnection
Fabrication Materials science Physics and Astronomy (miscellaneous) business.industry Transistor General Engineering General Physics and Astronomy Fluorosilicate glass law.invention Capacitor Reliability (semiconductor) CMOS law Hardware_INTEGRATEDCIRCUITS Optoelectronics Wafer business |
| Zdroj: | Japanese Journal of Applied Physics. 47:2710-2713 |
| ISSN: | 1347-4065 0021-4922 |
| DOI: | 10.1143/jjap.47.2710 |
| Popis: | Enhanced yield and reliability through process improvements, leading to a manufacturable process for a full-bit functional 8 Mbit one transitor–one capacitor (1T–1C) embedded ferroelectric random access memory (eFRAM) fabricated within a low-leakage 130 nm, 5 lm Cu/fluorosilicate glass (FSG) interconnect complementary metal oxide semiconductor (CMOS) logic process, are described. Higher signal margins are further enabled by the single-bit substitution methodology that replaces bits at the low-end of the original distribution with redundant elements. Retention tests on wafers with signal margins above a threshold value for screen show no bit fails for bakes extending up to 1000 h, suggesting retention lifetimes of more than 10 years at 85 °C. Using the qualified process reported in this paper, commercial products are being routinely produced in our fabrication facilities. |
| Databáze: | OpenAIRE |
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