NanoCMOS optimized DVCC-based quadrature voltage controlled oscillator performances prediction through bisquare-weights method
| Autor: | Mourad Loulou, Chayma Bensalem, Sawssan Lahiani, Houda Daoud, Samir Bensalem |
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| Rok vydání: | 2019 |
| Předmět: |
Computer science
Heuristic (computer science) 020208 electrical & electronic engineering Process (computing) 020206 networking & telecommunications Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Surfaces Coatings and Films CMOS Hardware and Architecture Power consumption Signal Processing Current conveyor Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering Cmos process Quadrature voltage controlled oscillator Voltage |
| Zdroj: | Analog Integrated Circuits and Signal Processing. 100:547-563 |
| ISSN: | 1573-1979 0925-1030 |
| DOI: | 10.1007/s10470-019-01414-0 |
| Popis: | This paper dealt with the prediction of optimized quadrature voltage controlled oscillator (QVCO) performances for the upcoming CMOS nanoprocess using the robust bisquare weights (BW) method. Using differential voltage current conveyor, the QVCO was optimized for low power consumption with TSMC 0.18 µm CMOS process under ± 0.9 V supply voltage and relying on the Heuristic method. To provide solutions to the nanoscale CMOS challenges, a synoptic of nanoCMOS circuit performances prediction including the BW method was proposed to predict the performances of the optimized QVCO circuit. Some predicted performances for 45–22 nm process nodes were obtained in order to solve design challenges generated by upcoming analog high frequency (HF) systems with severe requirements. The behaviour of the optimized QVCO performances with process scaling were detailed. |
| Databáze: | OpenAIRE |
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