Effect of Cu damascene metallization on gate SiO/sub 2/ plasma damage
| Autor: | M.Y. Hao, Geoffrey Choh-Fei Yeap, S. Chen, D.S. Bang, Q. Xiang, M.R. Lin |
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| Rok vydání: | 2002 |
| Předmět: |
Materials science
business.industry Copper interconnect Electrical engineering chemistry.chemical_element Hardware_PERFORMANCEANDRELIABILITY Plasma Copper chemistry Plasma chemistry Hardware_INTEGRATEDCIRCUITS Optoelectronics Wafer business Current density Quantum tunnelling Hardware_LOGICDESIGN Leakage (electronics) |
| Zdroj: | 1998 3rd International Symposium on Plasma Process-Induced Damage (Cat. No.98EX100). |
| Popis: | The effect of using a Cu damascene process on plasma process-induced damage (PPID) is studied in relationship to future scaling rules. Wafers processed using a Cu damascene metallization scheme show little increase in gate leakage as antenna ratios are increased. This is in contrast to conventional Al wafers, which show a significant increase in gate leakage as the antenna ratio is increased. Applying this result to future technology generations shows that wafers produced with a Cu damascene process have the potential to exhibit significantly less gate leakage for future technology generations. |
| Databáze: | OpenAIRE |
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