Parallel implementation of HEVC encoder on multicore ARM-based platform
| Autor: | Randa Khemiri, Nejmeddine Bahri, Mohamed Maazouz, Nouri Masmoudi |
|---|---|
| Rok vydání: | 2019 |
| Předmět: |
020203 distributed computing
Multi-core processor Computational complexity theory Computer science 02 engineering and technology Video quality High-definition video Computer architecture 0202 electrical engineering electronic engineering information engineering Codec 020201 artificial intelligence & image processing Rate distortion Encoder Coding (social sciences) |
| Zdroj: | SSD |
| DOI: | 10.1109/ssd.2019.8893218 |
| Popis: | High Efficiency Video Coding (HEVC) is the new emerging standard released as a successor to H.264/AVC. It aims to improve the encoding performance by saving 50% of the bitrate with the same visual quality. This encoding performance makes it more suitable for high definition video applications and could be the next embedded video codec on the majority of multimedia devices. However, this performance is coupled with tremendous computational complexity which makes it very hard to achieve a real-time video encoding with classic embedded processor architectures. Consequently, multicore technology of programmable processors offers a very promising solution to overcome this complexity. In this context, this paper presents a parallel implementation of the HEVC encoder All-Intra (AI) configuration on Quad-core ARM-based platform running at 1.7GHz. OpenMP is used as parallel programming paradigm exploiting the Frame Level Parallelism technique. Experimental results show that parallel processing using four threads allows saving up to 73% of encoding time and speeds up the encoding process by a factor of 3.77 without any rate distortion in terms of video quality or bitrate. |
| Databáze: | OpenAIRE |
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