A 50-Gb/s PAM4 Si-Photonic Transmitter With Digital-Assisted Distributed Driver and Integrated CDR in 40-nm CMOS
Autor: | Miaofeng Li, Bozhi Yin, Nan Qi, Patrick Chiang, Jian Liu, Xi Xiao, Jian He, Nanjian Wu, Shang Hu, Qiwen Liao, Jingbo Shi |
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Rok vydání: | 2020 |
Předmět: |
Physics
business.industry 020208 electrical & electronic engineering Transmitter Distributed amplifier 02 engineering and technology Multiplexer CMOS Modulation 0202 electrical engineering electronic engineering information engineering Electronic engineering Demodulation Electrical and Electronic Engineering Photonics business Jitter |
Zdroj: | IEEE Journal of Solid-State Circuits. 55:1282-1296 |
ISSN: | 1558-173X 0018-9200 |
DOI: | 10.1109/jssc.2020.2967560 |
Popis: | A 50-Gb/s four-level pulse-amplitude modulation (PAM4) silicon photonic transmitter is presented, which is composed of a 40-nm bulk CMOS driver hybrid integrated with a 180-nm silicon-on-insulator (SOI) CMOS Mach–Zehnder modulator (MZM). To recover and demodulate 50-Gb/s PAM4 data into dual-25-Gb/s nonreturn to zero (NRZ) streams for the co-designed MZM digital-analog converter (DAC), a reference-less clock and data recovery (CDR) is integrated, and to achieve high swing and high speed, the driver is made in a distributed amplifier (DA), employing push–pull cells that are grouped in three segments. A digital-assisted distributed driver (DADD) that replaces the input T-line by segmented 2:1 multiplexers and buffers is, thus, proposed. Precise time gating in each segment allows for velocity match in both the DA and optical DAC, as well as the in-segment pre-emphasis without power-hungry analog delay stages. Measurement results show that the driver and CDR achieve 4-VPP differential swing, 1.19-ps rms jitter, and 1.34-W power consumption at 50 Gb/s. An optical transmitter is demonstrated by wire-bonding the driver to the MZM DAC, achieving 50-Gb/s PAM4 output with 6.35-ps rms jitter and improved linearity. |
Databáze: | OpenAIRE |
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