Implementation of high-k and metal gate materials for the 45nm node and beyond: gate patterning development
| Autor: | Johan Vertommen, Stephan Beckx, V. Paraschiv, B. Coenegrachts, Serge Biesemans, K. Henson, S. Degendt, Patrick Jaenen, S. Vanhaelemeersch, S. Locorotondo, M. Demand, Denis Shamiryan, Werner Boullart, Martine Claes |
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| Rok vydání: | 2005 |
| Předmět: |
Materials science
Silicon business.industry chemistry.chemical_element Nanotechnology Condensed Matter Physics Engraving Atomic and Molecular Physics and Optics Surfaces Coatings and Films Electronic Optical and Magnetic Materials chemistry Gate oxide Etching (microfabrication) visual_art visual_art.visual_art_medium Optoelectronics Field-effect transistor Node (circuits) Electrical and Electronic Engineering Safety Risk Reliability and Quality business Metal gate High-κ dielectric |
| Zdroj: | Microelectronics Reliability. 45:1007-1011 |
| ISSN: | 0026-2714 |
| Popis: | We report on gate patterning development for the 45 nm node and beyond. Both poly-Si and different metal gates in combination with medium- k and high- k dielectrics have been defined. Source/drain silicon recess has been characterized for different stacks, yielding optimised processes for all investigated. Using hardmask based etching allowed us to produce sub-20 nm poly-Si and metal gates. Implementation of advanced metal gate patterning in already developed multi-gate field effect transistors (MuGFET) devices has been demonstrated. |
| Databáze: | OpenAIRE |
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