| Autor: |
Kiyohiro Furutani, Y. Okasaka, Hiroshi Miyamoto, Yoshikazu Morooka, T. Kajimoto, Hideyuki Ozaki, Y. Tsukikawa |
| Rok vydání: |
1994 |
| Předmět: |
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| Zdroj: |
IEEE Journal of Solid-State Circuits. 29:534-538 |
| ISSN: |
0018-9200 |
| DOI: |
10.1109/4.280705 |
| Popis: |
An efficient back-bias (V/sub bb/) generator with a newly introduced hybrid pumping circuit (HPC) is described. This system attains a V/sub bb/ level of /spl minus/1.44 V at V/sub cc/=1.5 V, compared to a conventional system in which V/sub bb/ only reaches /spl minus/0.6 V. HPC can pump without the threshold voltage (V/sub th/) loss that conventional systems suffer. HPC is indispensable for 1.5-V DRAMs, because a V/sub bb/ level lower than /spl minus/1.0 V is necessary to meet the limitations of the V/sub th/, of the access transistor. HPC uses one NMOS and one PMOS pumping transistor. By adopting a triple-well structure at the pumping circuit area, the NMOS can be employed as a pumping transistor without minority carrier injection. > |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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