Investigation of a Sequential Three-Dimensional Process for Back-Illuminated CMOS Image Sensors With Miniaturized Pixels
| Autor: | B. Giffard, P. Coudrain, C. Lagahe-Blanchard, X. Gagnard, Perrine Batude, P. Magnan, Pascal Ancey, M. Vinet, Yvon Cazaux, A. Pouydebasque, C. Leyris, A. Castex |
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| Rok vydání: | 2009 |
| Předmět: |
Engineering
Pixel business.industry Transistor Silicon on insulator Hardware_PERFORMANCEANDRELIABILITY Integrated circuit Electronic Optical and Magnetic Materials Photodiode law.invention CMOS law Logic gate Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering Image sensor business |
| Zdroj: | IEEE Transactions on Electron Devices. 56:2403-2413 |
| ISSN: | 1557-9646 0018-9383 |
| DOI: | 10.1109/ted.2009.2030990 |
| Popis: | A new 3-D CMOS image sensor architecture is presented as a potential candidate for submicrometer pixels. To overcome the scaling challenge related to miniaturized pixel design rules, far beyond traditional 3-D stacking alignment capabilities, a sequential construction is applied. This paper gives a technical overview of this 3-D scheme and validates a part of its building blocks. As a consequence of a sequential process, the thermal budget is limited to ensure bottom device immunity. Subsequently, high-quality SOI film transfer above the first layer by direct bonding and etch back is demonstrated. Finally, the low-temperature processing of HfO2/TiN fully depleted silicon-on-insulator readout transistors is detailed and evaluated from a low frequency noise point of view. |
| Databáze: | OpenAIRE |
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