An Efficient Radix-4 Scalable Architecture for Montgomery Modular Multiplication
| Autor: | Shiann-Rong Kuang, Chih-Yuan Liang, Chun-Chi Chen |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
business.industry
Computer science Computation 020208 electrical & electronic engineering Cryptography 02 engineering and technology Parallel computing 020202 computer hardware & architecture Pipeline transport Montgomery reduction Scalability 0202 electrical engineering electronic engineering information engineering Algorithm design Electrical and Electronic Engineering Latency (engineering) business Quotient |
| Zdroj: | IEEE Transactions on Circuits and Systems II: Express Briefs. 63:568-572 |
| ISSN: | 1558-3791 1549-7747 |
| Popis: | To achieve low latency, existing radix-4 scalable architectures for word-based Montgomery modular multiplication usually suffer from high design and hardware complexities. This brief presents a simple compression scheme and circuit to remove the data dependence in the accumulation process and accomplish one-cycle latency without quotient pipeline. The complex computation and encoding of quotient digits are thus avoided, leading to up to 10.6% and 17.7% reductions in area and power than previous work while maintaining very high performance. Consequently, the proposed radix-4 scalable architecture appears to be very suited for low-complexity and low-power cryptographic applications. |
| Databáze: | OpenAIRE |
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