Improvement of short-term frequency stability of the Chip Scale Atomic Clock
| Autor: | Peter Kubinec, Adam Fibich, Tomas Bagala, V. Stofanik |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
Engineering
010504 meteorology & atmospheric sciences Chip-scale atomic clock business.industry Electrical engineering 010502 geochemistry & geophysics 01 natural sciences Stability (probability) Temperature measurement Time–frequency analysis Term (time) Power (physics) Phase noise Electronic engineering Radio frequency business 0105 earth and related environmental sciences |
| Zdroj: | 2016 IEEE International Frequency Control Symposium (IFCS). |
| DOI: | 10.1109/fcs.2016.7546746 |
| Popis: | Utilization of the Chip Scale Atomic Clock (CSAC) today gives great potential for wide range of strategic systems requiring superior long-term frequency stability. Compared to CSAC, an OCXO has many drawbacks, e.g. it has larger long-term frequency instabilities (aging rate), longer warm-up time and higher power consumption. On the other hand, the main disadvantage of the CSAC is the higher phase noise. In this paper we describe a method of improvement of the CSAC SA.45s short-term frequency stability (phase-noise) using an external OCXO (MTI 230-0827) syntonized to the CSAC. In the low power mode, the CSAC SA.45s consumes less than 20 mW of power; however it operates as simple TCXO and over a full operating temperature range, the frequency stability is limited to ±1 ppm. In the last part of the paper we introduce combined low power clock system that can achieve frequency stability ±0.01 ppm over a wide temperature range, while consuming similar power. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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