Autor: |
Masaaki Aoki, Nobuhiko Nakano, Kensuke Osonoe, Goro Yoshinari, Yoshio Murakami, Takahiro Asai, Hitoshi Kida |
Rok vydání: |
2016 |
Předmět: |
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Zdroj: |
2016 IEEE 66th Electronic Components and Technology Conference (ECTC). |
DOI: |
10.1109/ectc.2016.79 |
Popis: |
Power semiconductor devices and modules need highly efficient heat dissipation system having a chip bonding layer with high thermal conductance and reliability. Ag sintering chip-attachment has several advantages for heat dissipation. This work clarifies the thermal stress profiles under thermal cycling test by 3D multi-physics solver for double-side and single-side direct bonding structures with Ag sintered layers on Cu plates. Results show that the maximum stress point is at Si chip corner in the double-side bonding structure with Ag sintered layers, and the maximum stress point is at bonding layer corner in the single-side bonding structure. The stress values of Ag sintered layer in double-side bonding are much lower than the stress values of single-side bonding. In contrast the maximum stress value of Si chip in double-side bonding is higher than that in single-side bonding, because the upward convex warp of Si is suppressed in double-side bonding. It was found that the maximum stress value at Si chip corner for Ag sintered bonding is lower than that for conventional solder in double-side bonding structure. There is also the bonding layer TCE value for minimizing the thermal stress at bonding center, since the stress at bonding interface is thought to be caused by the difference of thermal expansion between Ag sintered layer and Cu plate. |
Databáze: |
OpenAIRE |
Externí odkaz: |
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