Logic circuit synthesis using Prolog
| Autor: | Nobuaki Kawato, Takao Uehara |
|---|---|
| Rok vydání: | 1983 |
| Předmět: |
Digital electronics
Theoretical computer science Computer Networks and Communications business.industry Programming language Computer science Logic family computer.software_genre Expert system Theoretical Computer Science Prolog Logic synthesis Hardware and Architecture Logic gate Hardware_INTEGRATEDCIRCUITS business computer Software Hardware_LOGICDESIGN Logic optimization computer.programming_language Register-transfer level |
| Zdroj: | New Generation Computing. 1:187-193 |
| ISSN: | 1882-7055 0288-3635 |
| DOI: | 10.1007/bf03037425 |
| Popis: | This paper briefly reviews the current use of CAD in logic design, and then describes an expert system used to synthesize logic circuits. Specialized knowledge dealing with standard TTL ICs is written in Prolog and AGE, and the results are compared. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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