Fabrication of NMOS capacitors with a low-voltage coefficient at a silicon foundry
| Autor: | W.J. Helms |
|---|---|
| Rok vydání: | 1985 |
| Předmět: |
Analogue electronics
Computer science business.industry Electrical engineering Integrated circuit design Chip Switched capacitor Electronic Optical and Magnetic Materials law.invention Capacitor Application-specific integrated circuit law Hardware_INTEGRATEDCIRCUITS Electronic engineering Electrical and Electronic Engineering business Low voltage NMOS logic |
| Zdroj: | IEEE Electron Device Letters. 6:54-56 |
| ISSN: | 0741-3106 |
| DOI: | 10.1109/edl.1985.26039 |
| Popis: | The custom integrated circuit design technique pioneered by Mead and Conway [1] is often used for moderately complex digital systems. The fabrication is carried out at a "foundry" where a "standard" NMOS process is applied to the design. In this note, the Mead-Conway technique has been applied to analog circuits with the goal of producing a reasonable quality switched capacitor filter with as few process modifications as possible. Seven chip runs have been carried out at two separate foundries with good and consistent results. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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