Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor

Autor:	G. M. Matos, C. J. Tavares, C. Bungardean, J. T. de Sousa
Rok vydání:	2004
Předmět:	Virtual circuit Computer science business.industry Pipeline (computing) Parallel computing Reconfigurable computing Software Computer architecture Embedded system Scalability business Boolean satisfiability problem Field-programmable gate array Context switch
Zdroj:	Field Programmable Logic and Application ISBN: 9783540229896 FPL
DOI:	10.1007/978-3-540-30117-2_36
Popis:	This paper proposes an architecture that combines a context-switching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling between configware and software. The virtual circuit is an arbitrarily large clause pipeline, partitioned into sections of a number of stages (hardware pages), which can fit in the configware. The hardware performs logical implications, grades and select decision variables. The software monitors the data and takes care of the high-level algorithmic flow. Experimental results show speed-ups that reach up to two orders of magnitude in one case. Future improvements for addressing scalability and performance issues are also discussed.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::0cc5f9c5ec90a16f8ba3440db7df99a7 https://doi.org/10.1007/978-3-540-30117-2_36 Zobrazit plný text záznamu