| Autor: |
Sriadibhatla Sridevi, Achalla Surya Bharath, S. Raparthi, R. Nagulapalli |
| Rok vydání: |
2018 |
| Předmět: |
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| Zdroj: |
2018 International Conference on Current Trends towards Converging Technologies (ICCTCT). |
| DOI: |
10.1109/icctct.2018.8551030 |
| Popis: |
In this paper linearity of standard opamp and importance of this parameter for typical applications like continuous-time filters have been discussed. Out of few factors affecting the linearity, drain to source voltage of the differential pair has been root caused to this problem. A technique to improve the linearity by using a common mode feedback applied to the Cascode devices was proposed. A test circuit developed in 65nm CMOS technology to verify the robustness of the proposed technique and post-layout simulations shows 45% linearity improvement compared to the conventional architecture. Circuit operates at 1.2V and draws $235\mu \mathrm{A}$ static current and test circuit occupies 4500um2 silicon area. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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