| Popis: |
The Fast Fourier Transform (FFT)− processor can be described as the most important Numerical Algorithm of our lifetime. In this paper, we have presented different Memory-based Real Fast Fourier Transform (RFFT) Architectures for low-area applications with the Processing Elements (PE) like High Radix Small Butterfly (HRSB), Urdhva Tiryakbhayam Butterfly (UTB) and a PE with vedic multiplier-carry lookahead units are utilized to reduce the Area, Delay and Area-Delay-Product (ADP). In this, the FFT processor is based on Radix-2 Decimation-In-Frequency (DIF) Algorithm, and it also supports higher radix algorithms. The architectures are implemented on various Xilinx Field Programmable Gate Array (FPGA) devices and also on 180 nm Application-Specific Integrated Circuit (ASIC) to compare different parameters like Area, Delay and Power. |
