Near-threshold circuit variability in 14nm FinFETs for ultra-low power applications
| Autor: | Sriram Balasubramanian, Karthik Chandrasekaran, C. Weintraub, Vivek Joshi, A.B. Icel, Mangesh Kushare, Vinayak Mahajan, Arunima Dasgupta, N. Pimparkar, Takashi Shimizu, Kun Qian, Juhi Bansal |
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| Rok vydání: | 2016 |
| Předmět: |
010302 applied physics
Digital electronics Ultra low power Engineering business.industry Electrical engineering Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Ring oscillator 01 natural sciences 020202 computer hardware & architecture Power (physics) Threshold voltage CMOS 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electronic engineering business Scaling Voltage |
| Zdroj: | ISQED |
| DOI: | 10.1109/isqed.2016.7479210 |
| Popis: | Ultra low power (ULP) applications use supply voltage (Vdd) scaling as an effective way of reducing power. However, as Vdd is scaled near the threshold voltage (Vt), increased variability limits the minimum Vdd and power that can be realized. This paper outlines a Veff variability framework to capture the total delay variation seen in digital circuits and describes its applicability for near-threshold delay variability analysis. The low-voltage variability framework has been validated against 14nm-FinFET ring oscillator (RO) measurements. |
| Databáze: | OpenAIRE |
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