Exploiting Thread and Data Level Parallelism for Ultimate Parallel SystemC Simulation
| Autor: | Rainer Dömer, Tim Schmidt, Guantao Liu |
|---|---|
| Rok vydání: | 2017 |
| Předmět: |
020203 distributed computing
Speedup Data parallelism Computer science 02 engineering and technology Thread (computing) Parallel computing computer.software_genre 020202 computer hardware & architecture Instruction set Automatic parallelization SystemC 0202 electrical engineering electronic engineering information engineering Algorithm design Compiler computer Xeon Phi computer.programming_language |
| Zdroj: | DAC |
| DOI: | 10.1145/3061639.3062243 |
| Popis: | Most parallel SystemC approaches have two limitations: (a) the user must manually separate all parallel threads to avoid data corruption due to race conditions, and (b) available hardware vector units are not utilized. In this paper, we present an advanced compiler infrastructure for automatic parallelization of SystemC models at the thread-level. In addition, our infrastructure exploits opportunities for data-level parallelization. Our experimental results show a nearly linear speedup of N×M, where N and M denote the thread and data-level factors, respectively. In turn, a 4-core multi-processor achieves a speedup of up to 8.8×, and a 60-core Xeon Phi processor reaches up to 212×. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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