Self-aligned emitter power HBT and self-aligned gate power HFET for low/unity supply voltage operation in PHS handsets
| Autor: | Yorito Ota, Hiroyuki Masato, Mitsuru Nishitsuji, Takahiro Yokoyama, Shinji Yamamoto, Manabu Yanagihara, Inoue Kaoru |
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| Rok vydání: | 1997 |
| Předmět: |
Power gain
Materials science business.industry Heterojunction bipolar transistor Electrical engineering Self-aligned gate Condensed Matter Physics Capacitance Electronic Optical and Magnetic Materials Parasitic element Materials Chemistry Optoelectronics Electrical and Electronic Engineering business Current density Common emitter Voltage |
| Zdroj: | Solid-State Electronics. 41:1675-1679 |
| ISSN: | 0038-1101 |
| DOI: | 10.1016/s0038-1101(97)00122-6 |
| Popis: | A new power HBT and HFET were developed for low unity supply voltage operation in PHS handsets. The emitter region, the emitter electrode, the buried collector and the base electrodes in the power HBT are formed using the emitter electrode self-alignment process in order to reduce parasitic resistance and capacitance. The wirings on each electrode of the HBT are formed by Au plating technique for high current operation. The gate electrode in the power HFET is self-aligned to the drain/source electrodes by using the drain/source contact mesas as a mask, where the distance between the drain and the source is minimized and the parasitic resistances are reduced. In addition, an asymmetrical double-doped structure of AlGaAs/GaAs/InGaAs/AlGaAs is applied to the HFET in order to obtain a high current density. Both the power HBT and HFET exhibited the knee voltage less than 1 V with the maximum current more than 500 mA. The power HBT performed a power gain of 14.2 dB, an efficiency of 33.8% and the power HFET performed 12.5 dB and 34.5%, with a sufficient margin of distortion for PHS standard at an output power of 22 dBm, a supply voltage of 3.5 V and a frequency of 1.9 GHz under the unity operation. |
| Databáze: | OpenAIRE |
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