Inner cylinder Ta/sub 2/O/sub 5/ capacitor process for 1 Gb DRAM and beyond

Autor: Sang-In Lee, Young-dae Kim, Yong Woo Hyung, Kab Jin Nam, Ki Yeon Park, Seok Jun Won, Young Wook Park, Moon Young Lee
Rok vydání: 2003
Předmět:
Zdroj: 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325).
DOI: 10.1109/vlsit.1999.799358
Popis: Capacitor manufacturing technology for 0.13 /spl mu/m design rule 1 Gbit DRAMs has been developed using an improved MIS (metal-insulator-semiconductor) tantalum oxide capacitor module process in a cylinder-shaped storage node with rugged-type inner surface (called inner cylinder). Capacitance of more than 26 fF/cell, leakage current of below 0.2 fA/cell at V/sub p/=1.0 V and breakdown lifetime of over 10 years were obtained as electrical properties, satisfying production level requirements.
Databáze: OpenAIRE