| Autor: |
Pin Cheng Huang, Jackal Ma, Jeng Hung Pan, Jian Chang Lin, De Bin Lin, James Cc Chang |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA). |
| DOI: |
10.1109/ipfa49335.2020.9261066 |
| Popis: |
Nano-probing system is a common tool in failure analysis (FA) field and it is widely used for nanoscale defect localization, transistor characterization and local circuit functional debug for soft failure verification. While device hard failure can be easily localized or characterized by DC bias. However, some soft failures related with timing failures are not easy to be diagnosed by DC measurement especially it is related to speed issue. These cases need to be applied with pulse signal to manifest the failure signatures by observe the rising time and falling time behaviors. In this paper, a novel application of circuit debugging by using nano-probing technique will be demonstrated. A full adder is a digital circuit that performs a set of binary numbers, and the function can easily be verified from the signals and truth table. Forcing a voltage in the input side of full adder circuit, and measuring its output signals, FA engineers can easily diagnose whether the full adder function is workable or not. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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