0.65 V integrable electronic realisation of integer‐ and fractional‐order Hindmarsh–Rose neuron model using companding technique
Autor: | Farooq Ahmad Khanday, Mohammad Rafiq Dar, Josep L. Rossello, Nasir Ali Kant, Costas Psychalinos |
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Rok vydání: | 2018 |
Předmět: |
Computer science
020208 electrical & electronic engineering Biological neuron model 02 engineering and technology Integrated circuit design Topology 01 natural sciences law.invention Differentiator Capacitor CMOS Control and Systems Engineering law Integrator 0103 physical sciences Hardware_INTEGRATEDCIRCUITS 0202 electrical engineering electronic engineering information engineering Electrical and Electronic Engineering 010301 acoustics Companding Electronic circuit |
Zdroj: | IET Circuits, Devices & Systems. 12:696-706 |
ISSN: | 1751-8598 1751-858X |
DOI: | 10.1049/iet-cds.2018.5033 |
Popis: | Some neurons like neocortical pyramidal neurons adapt with multiple time-scales, which is consistent with fractional-order differentiation. The fractional-order neuron models are therefore believed to portray the firing rate of neurons more accurately than their integer-order models. It has been studied that as the fractional order of differentiator and integrator involved in the neuron model decreases, bursting frequency of the neurons increases. The opposite effect has been observed on increasing the external excitation. In this study, integer- and fractional-order Hindmarsh–Rose (HR) neuron models have been implemented using sinh companding technique. Besides, the application of the HR neuron model in a simple network of two neurons has also been considered. The designs offer a low-voltage and low-power implementation along with the electronic tunability of the performance characteristics. Due to the use of only metal-oxide semiconductor (MOS) transistors and grounded capacitors, the proposed implementation can be integrated in chip form. On comparing with existing implementations, the implemented fractional-order and integer-order models show a better performance in terms of power consumption, supply voltage, order and flexibility. The performance of the circuits has been verified using 130 nm complementary MOS (CMOS) technology process provided by Austrian Micro Systems using HSPICE simulation software. |
Databáze: | OpenAIRE |
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