High Defect-Density Yield Learning using Three-Dimensional Logic Test Chips
| Autor: | R. D. Shawn Blanton, Zeye Liu |
|---|---|
| Rok vydání: | 2020 |
| Předmět: |
010302 applied physics
Yield (engineering) Semiconductor device fabrication Computer science Volume (computing) 02 engineering and technology 01 natural sciences 020202 computer hardware & architecture Test (assessment) Computer engineering Dimension (vector space) 0103 physical sciences 0202 electrical engineering electronic engineering information engineering Medical diagnosis Focus (optics) Random logic |
| Zdroj: | ITC |
| Popis: | Test vehicles of various types that aim to identify yield detractors are essential for maturing a new semiconductor process before high volume production. Due to large number of unpredictable geometries created by place-and-route, test vehicles that focus on random logic are of the utmost importance. Prior work that utilizes a two-dimensional regular array of logic blocks has demonstrated significant superiority over conventional approaches. In this work, a third dimension is added to ensure efficient diagnosis of multiple defects that frequently occur within a high defect-density environment. Experiments demonstrate a significant improvement in perfect diagnoses over the two-dimensional LCV. |
| Databáze: | OpenAIRE |
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