Self-timed automatic test pattern generation for null convention logic
| Autor: | Mark C. Reed, Sri Parameswaran, Karl Fant, Nastaran Nemati |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
Computer science
Clock signal 020208 electrical & electronic engineering Hardware_PERFORMANCEANDRELIABILITY 02 engineering and technology Automatic test pattern generation 020202 computer hardware & architecture Computer engineering Asynchronous communication Logic gate Fault coverage 0202 electrical engineering electronic engineering information engineering Overhead (computing) State (computer science) Algorithm Testability Hardware_LOGICDESIGN |
| Zdroj: | MWSCAS |
| DOI: | 10.1109/mwscas.2016.7870032 |
| Popis: | This work proposes automatic test pattern generation (ATPG) for Null Convention Logic (NCL). NCL is a robust asynchronous paradigm that introduces new challenges to test and testability algorithms due to the lack of a clock signal and the presence of a large number of state holding elements. The main features of this work are clockless, self-timed ATPG for all single stuck-at faults in NCL circuits, including those of gate internal feedback (GIF). The detection of faults on GIF is performed with no added test hardware. To the extent of our knowledge, this is the first work which has addressed clockless, self-timed ATPG with coverage for faults on GIF of NCL gates and with no area overhead. The proposed test generation algorithms are evaluated for several real-size NCL circuits with average 96.2% fault coverage. |
| Databáze: | OpenAIRE |
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