Fabrication of SiC JFET-Based Monolithic Integrated Circuits
| Autor: | Mehran Mehregany, Amita C. Patil, Xiao-An Fu, Steven L. Garverick, Te Hao Lee |
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| Rok vydání: | 2010 |
| Předmět: |
Fabrication
Materials science business.industry Mechanical Engineering Electrical engineering Differential amplifier JFET Integrated circuit Condensed Matter Physics law.invention Threshold voltage Mechanics of Materials law Optoelectronics General Materials Science Wafer Electronics business Electronic circuit |
| Zdroj: | Materials Science Forum. :1115-1118 |
| ISSN: | 1662-9752 |
| DOI: | 10.4028/www.scientific.net/msf.645-648.1115 |
| Popis: | We report fabrication of lateral, n-channel, depletion-mode, junction-field-effect-transistor (JFET) monolithic analog integrated circuits (ICs) in 6H-SiC. Ti/TaSi2/Pt forms the contact metalization, Ti/Pt the interconnect metal, and the SiO2/Si3N4/SiO2 interlayer dielectric. The threshold voltage and pinch off current indicate that the actual channel doping and thickness is close to the nominal values specified. The wafer yield for good circuits of a single-stage differential amplifier is 54% out of 46 copies. |
| Databáze: | OpenAIRE |
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