CMOS Pixel Potentials Extraction Method From Test Structures Based on EKV Model

Autor:	S. Ricq, C. Doyen, Pascal Fonteneau, Olivier Marcelot, Pierre Magnan
Rok vydání:	2021
Předmět:	010302 applied physics Series (mathematics) Pixel Computer science Transistor 01 natural sciences Electronic Optical and Magnetic Materials law.invention Photodiode CMOS law Logic gate 0103 physical sciences Calibration Electric potential Electrical and Electronic Engineering Algorithm
Zdroj:	IEEE Transactions on Electron Devices. 68:2835-2840
ISSN:	1557-9646 0018-9383
Popis:	Knowing exactly potentials’ distribution in pixels is a key to ensure that electronretention and transport enable a good pixel operation. Moreover, it is also a key parameter for controlof charge storage capabilityor fullwell capacity, strongly driven by potential barriers. In this article, a new method is presented to characterize potentialswithin pixels from test structure measurements. The proposed method enables to extract potential under a gate, pinning potential of photodiodes or memories, and any potential along the charge path. It is based on the use of the Enz–Krummenacher–Vittoz (EKV) model together with measurements on adequate test structures. Thanks to the so-called “ ${Y}$ function series resistance correction,” the method can even be applied to test structuresincludingdevices in series as in real pixel. The method proposed here is assessed using Sentaurus technologycomputer-aided design (TCAD) simulation results. Such potentials extracted on the test structure can be used for process and pixel developments, devicemonitoring, reliability studies, and TCAD calibration.
Databáze:	OpenAIRE
Externí odkaz:	https://explore.openaire.eu/search/publication?articleId=doi_________::036af5c54c7e085259c12c4e92804476 https://doi.org/10.1109/ted.2021.3075178 Zobrazit plný text záznamu