High-Speed Data Transfer Based on SERDES

Autor: Feng Zhang
Rok vydání: 2020
Předmět:
Zdroj: High-speed Serial Buses in Embedded Systems ISBN: 9789811518676
DOI: 10.1007/978-981-15-1868-3_2
Popis: SERDES (Serialization/De-serialization) transfer mechanism, namely a serializer at the transmitter for serializing the parallel data into a serial bit stream and a de-serializer at the receiver for recovering the bit stream back to the original parallel data. The parallel-to-serial and serial-to-parallel functions were mainly implemented by specific ASICs first with DS92LV16 (National semiconductor; DS92LV16 16-bit bus LVDS serializer/deserializer—25–80 MHz, [1]) and DS90CR287 (National semiconductor; DS90CR287/DS90CR288A +3.3 V rising edge data strobe LVDS 28-bit channel link-85 MHZ, [2]) as examples. With these chips, a communication from Chip To Chip, Board To Board and Chassis To Chassis is established.
Databáze: OpenAIRE