Efficient yield estimation through generalized importance sampling with application to NBL-assisted SRAM bitcells
Autor: | Jean-Christophe Lafont, Faress Tissafi Drissi, Lorenzo Ciampolini, Xavier Jonsson, David Turgis, Jean-Paul Morin, Joseph Nguyen, Cyril Descleves |
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Rok vydání: | 2016 |
Předmět: |
Mathematical optimization
Speedup Computer science Monte Carlo method Extrapolation 02 engineering and technology 01 natural sciences Confidence interval 020202 computer hardware & architecture 010104 statistics & probability Convex optimization 0202 electrical engineering electronic engineering information engineering Variance reduction Static random-access memory 0101 mathematics Algorithm Importance sampling Quantile |
Zdroj: | ICCAD |
Popis: | We consider the general problem of the efficient and accurate determination of the yield of an integrated circuit, through electrical circuit level simulation, under variability constraints due to the manufacturing process. We demonstrate the performance of our general-purpose Importance Sampling based algorithm for the case of an industrial SRAM application. Section 1 reviews the notions of yield and how this translates to very low probability of failure estimation. We explain in detail the working principle of statically and dynamically write-assisted SRAM bitcells and the limitations of the classical static approximations for yield estimation of these structures. Section 2 explores naive statistical approaches for the determination of low probabilities and the notion of variance reduction. Section 3 explains the detailed mathematical background of our new algorithm. We show how the original extremely challenging problem is translated to a simpler convex optimization problem, and how the algorithm produces a standard confidence interval associated to a probability or quantile. Section 4 presents the quantitative results and speedup factors obtained on an industrial SRAM bitcell for the analysis of a write failure mechanism. Results obtained on static negative bit line assisted SRAM compares favorably to results obtained with extrapolation of static models and prove the accuracy of the method, while results obtained on dynamic negative bit line assisted SRAM allow to quantitatively optimize the assist circuitry and help to reduce its over-design margins. |
Databáze: | OpenAIRE |
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