| Autor: |
Benjamin Blampey, Abdessamad Boulmirat, Clement Jany, Abdelaziz Hamani, Cedric Dehos, Alexandre Siligaris, Jose Luis Gonzalez-Jimenez |
| Rok vydání: |
2020 |
| Předmět: |
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| Zdroj: |
2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC). |
| Popis: |
This paper describes a high order programmable frequency multiplier in the 60 GHz band. The circuit implements four chains that can address simultaneously four different frequencies of the IEEE 802.11ay standard and aims to channel bonding, full duplex, or MIMO systems. It is fabricated in a 45nm CMOS PDSOI technology. Each chain consumes 32.6mW and achieves lower than 178fsec of integrated jitter (in the band 10KHz-1.08GHz) for all synthesized frequencies. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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