Generalization of Logic Picture-based power estimation tool
| Autor: | M. H. Amin, Hassanein H. Amer, Mohamed Fouda, Ahmed ElTantawy, Mohamed B. Abdelhalim |
|---|---|
| Rok vydání: | 2010 |
| Předmět: |
Combinational logic
Sequential logic Maximum power principle Design space exploration Computer science Hardware_PERFORMANCEANDRELIABILITY Computer Science::Hardware Architecture Logic synthesis CMOS Computer engineering Dynamic demand Hardware_INTEGRATEDCIRCUITS Electronic engineering Hardware_LOGICDESIGN Logic optimization |
| Zdroj: | 2010 International Conference on Energy Aware Computing. |
| DOI: | 10.1109/iceac.2010.5702304 |
| Popis: | In this paper, the Logic Picture-based power estimation tool is extended to include more features. The Logic Picture is a technique used for CMOS dynamic power estimation in both combinational and sequential logic circuits. This technique proved to be more accurate and less time consuming compared to other techniques. This work enhances the tool by calculating the maximum power consumption in sequential circuits. Furthermore, it is extended to include all types of Flip-Flops and takes into account the power consumption in the internal nodes of these Flip-Flops. Finally, it is shown how to incorporate all the features and enhancements for Design Space Exploration in sequential circuits. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
|