Security Rule Checking in IC Design
| Autor: | Kan Xiao, Adib Nahiyan, Mark Tehranipoor |
|---|---|
| Rok vydání: | 2016 |
| Předmět: |
Design rule checking
Supply chain management General Computer Science Computer science business.industry 0211 other engineering and technologies Vulnerability 02 engineering and technology Integrated circuit design Computer security computer.software_genre 020202 computer hardware & architecture Security rule Abstraction layer 0202 electrical engineering electronic engineering information engineering Supply chain security Software engineering business computer 021106 design practice & management |
| Zdroj: | Computer. 49:54-61 |
| ISSN: | 0018-9162 |
| DOI: | 10.1109/mc.2016.226 |
| Popis: | The Design Security Rule Check (DSeRC) framework is a first step toward automating the analysis of integrated circuit design vulnerabilities. By mathematically modeling vulnerabilities at each abstraction level and associating them with metrics and rules, DSeRC aims to help designers quantitatively assess potential problems early on, improving security and reducing design costs. |
| Databáze: | OpenAIRE |
| Externí odkaz: |
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