| Autor: |
Vanchai Riewruja, Amphawan Julsereewong, Thepjit Cheypoca, Anucha Kaewpoonsuk |
| Rok vydání: |
2007 |
| Předmět: |
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| Zdroj: |
2007 International Conference on Control, Automation and Systems. |
| DOI: |
10.1109/iccas.2007.4406898 |
| Popis: |
This paper presents a one-bit cell of reverse Gray-code algorithmic analog-to-digital converter. The proposed converter comprises of full-wave rectifier, current mirrors, and current comparator. The realization method is simple, small in size, and suitable for integrated circuit form. The design strategy is based on the MOS biased at the edge of conduction to provide a low accumulated error and a low distortion in the transfer characteristic. An N-bit resolution can be achieved by cascading of the N proposed one-bit cells. PSPICE simulation results supporting the characteristics of proposed circuit are agreed with the expected values. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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