Design of a low on resistance high voltage (<100V) novel 3D NLDMOS with side STI and single P-top layer based on 0.18um BCD process technology

Autor: Shao-Ming Yang, Ankit Kumar, V. N. Vasantha Kumar, Aryadeep Mrinal, Vivek Ningaraju, Emita Yulia Hapsari, Gene Sheu
Rok vydání: 2013
Předmět:
Zdroj: 2013 IEEE 8th Nanotechnology Materials and Devices Conference (NMDC).
DOI: 10.1109/nmdc.2013.6707459
Popis: In this work, a single RESURF P-top layer with STI-sided N-LDMOS device is developed to realize a breakdown voltage of 20V-60V with lowest on-resistance and good charge balance which is demonstrated by using three-dimensional Sentaurus process and device simulators. By tuning not only the doping concentration in substrate, N-drift and P-top layer regions, but also the width ratio of N-drift region divided by STI one (WN-drift/WSTI), a low specific on-resistance while maintaining a high breakdown voltage can be achieved successfully in this work.
Databáze: OpenAIRE