| Autor: |
S. H. Elramly, S. W. Shaker |
| Jazyk: |
angličtina |
| Rok vydání: |
2010 |
| Předmět: |
|
| Zdroj: |
Telfor Journal, Vol 2, Iss 2, Pp 68-73 (2010) |
| ISSN: |
1821-3251 |
| Popis: |
Turbo codes are employed in every robust wireless digital communications system. Those codes have been adopted for the satellite return channel in DVB-RCS (Return Channel via Satellite) standard. In Software Defined Radios (SDRs), Field Programmable Gate Array technology (FPGA) is considered a highly configurable option for implementing many sophisticated signal processing tasks. The implementation for such codes is complex and dissipates a large amount of power. This paper studies the efficient implementation of quantized DVB-RCS turbo coding. Also, a low-power, turbo encoder for DVB-RCS is described using a VHDL code. The proposed encoder design is implemented on Xilinx Virtex-II Pro, XC2vpx30 FPGA chip. FPGA Advantage Pro package provided by Mentor Graphics is used for VHDL description and ISE 10.1 by Xilinx is used for synthetization. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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