Hardware/Software Implementation of Image Processing Systems Based on ARM Processor
| Autor: | Messaoudi, Kamel, Hakim, Doghmane, Bourouba, Houcine, Bourennane, El-Bay, Toumi, Salah |
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| Přispěvatelé: | Mohamed Cherif Messaadia University - Université Mohamed-Chérif Messaadia [Souk Ahras], Laboratoire Problèmes Inverses, Modélisation, Information et Systèmes (PI:MIS), Université de Guelma (PI:MIS), Université du 8 Mai 1945 [Guelma, Algérie], Laboratoire Electronique, Informatique et Image [UMR6306] (Le2i), Université de Bourgogne (UB)-École Nationale Supérieure d'Arts et Métiers (ENSAM), Arts et Métiers Sciences et Technologies, HESAM Université (HESAM)-HESAM Université (HESAM)-Arts et Métiers Sciences et Technologies, HESAM Université (HESAM)-HESAM Université (HESAM)-AgroSup Dijon - Institut National Supérieur des Sciences Agronomiques, de l'Alimentation et de l'Environnement-Centre National de la Recherche Scientifique (CNRS), Laboratoire d'Etude et de Recherche en Instrumentation et en Communication d'Annaba (LERICA), Université Badji Mokhtar - Annaba [Annaba] (UBMA), université de Bourgogne, IMVIA |
| Jazyk: | angličtina |
| Rok vydání: | 2020 |
| Předmět: | |
| Zdroj: | Proceedings of the International Conference on Recent Advances in Electrical Systems, Tunisia, 2019 International Conference on Recent Advances in Electrical Systems, Tunisia, 2019 International Conference on Recent Advances in Electrical Systems, Tunisia, 2019, Dec 2020, Hammamet, Tunisia |
| Popis: | International audience; In this paper we present a hardware/software platform for real-time image processing. We start with the creation of the hardware part based on the ARM processor (PS) with various drivers (PL) for reading, recording and displaying images. Using the SDK tool (Software Development Kit), we add software parts for the realization of some basic image processing algorithms. We use the Xilinx-VIVADO2016 tool for the proposed system design and we use the rapid development board (Xilinx-ZedBoard) for practical implementations. To realize the principle of codesign, we add hardware IPs (RTL level) for the implementation of the same image processing algorithms. To avoid the details of the HDL design, we use self-generated implementations given by the high-level tool named XSG (Xilinx-System-Generator). Various simulations are carried out firstly under XSG for the functional verification of the proposed accelerators before integrating them into the PL part of the proposed system. At this level, a software part is also developed to ensure coordination between the different hardware parts. |
| Databáze: | OpenAIRE |
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