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Ovaj rad opisuje projektiranje naponski upravljanog oscilatora na bazi prstenastog oscilatora u 180 nm CMOS tehnologiji. Arhitektura oscilatora zasniva se na prstenastoj strukturi triju ćelija za kašnjenje koje na ulazu i na izlazu imaju diferencijske signale. Oscilator daje nominalnu frekvenciju signala od 20 MHz pri naponu napajanja od 1,8 V. Kašnjenje pojedinih ćelija regulira se pomoću njihovih struja napajanja. Po završetku projektiranja provedene su tranzijentna analiza, AC analiza i analiza rubnih tehnologija. Njima je utvrđena ovisnost bitnih parametara oscilatora o promjenama ulaznih i vanjskih veličina. This thesis describes the design of a voltage-controlled oscillator based on ring oscillator in 180-nm CMOS technology. The oscillator architecture is based on a ring structure comprised of three delay cells, each with differential signals as their inputs and outputs. The oscillator produces a nominal signal frequency of 20 MHz with its supply voltage set at 1,8V. The delay of a given delay cell is controlled with its supply current. After the oscillator design was finished, transient analysis, AC analysis, and corner analysis were conducted. They provided insight into the impact of input parameters and external parameters on important oscillator parameters. |
