| Autor: |
Apvrille, Ludovic, Saqui-Sannes, Pierre de, Hotescu, Oana Andreea, Tempia Calvino, Alessandro |
| Přispěvatelé: |
Ecole Polytechnique Fédérale de Lausanne - EPFL (SWITZERLAND), Institut Supérieur de l'Aéronautique et de l'Espace - ISAE-SUPAERO (FRANCE), Télécom Paris (FRANCE) |
| Jazyk: |
angličtina |
| Rok vydání: |
2022 |
| Předmět: |
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| Popis: |
Formal verification of SysML models contributes to detect design errors early in the life cycle of systems. Incremental modeling of systems leads to repeat verification of systems models parts that were already verified in previous versions of the SysML model. This paper proposes to optimize the verification process by generating first a dependency graph of the SysML model. The dependency generation algorithm is implemented by free SysML tool TTool. An Avionics Full DupleX network serves as case study. |
| Databáze: |
OpenAIRE |
| Externí odkaz: |
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