Test limit evaluation for an ADC Design-for-Test approach by using a CAT platform
| Autor: | Lechuga, Y., Bounceur, Ahcène, Mozuelos, R., Matinez, Mar, Bracho, S., Mir, Salvador |
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| Přispěvatelé: | Electronics Technology, System and Automation Engineering Department, university of canterbria, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Universidad de Cantabria [Santander], Torella, Lucie, Bounceur, Ahcène |
| Jazyk: | angličtina |
| Rok vydání: | 2008 |
| Předmět: | |
| Zdroj: | Proc. of 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08) 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), Grenoble, France, November 12-14 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), Grenoble, France, November 12-14, Nov 2008, Grenoble, France. pp.session 1D2 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08) 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), Nov 2008, France. pp.0 |
| Popis: | ISBN : 978-2-84813-124-5; International audience; This paper presents a Design-for-Test method for folded and interpolated analog-to-digital converters. The test approach samples relative voltage deviations among internal circuit nodes. A fault simulation is used to establish the fault detection threshold of the BIST by using a CAT platform. |
| Databáze: | OpenAIRE |
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